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Reasoning Circuit Complexity

TL;DR

The R/K/G framework proposes that output quality is a function of reasoning capability (R), knowledge (K), and graph design quality (G). This document formalizes how G is measured, how reasoning graphs are analyzed, and how different graph topologies are compared — drawing on circuit complexity theory, dataflow graph theory, and standard algorithmic analysis. Reasoning graphs get structural measures (depth, width, verification density), a per-node cost model, a five-class topology hierarchy (G₁–G₅), and a precise quality/cost objective. Circuit complexity proved that computation has structural depth requirements. Cognitive engineering proposes that reasoning does too.

A scene

Why some answers need more steps

Two cooks are asked for the same dish. The first tastes nothing, plates in one motion, and is sometimes brilliant and sometimes inedible. The second works in stages — build the base, reduce it, taste, adjust, taste again, and if a component is off, start just that component over. The second cook is slower and dirties more pots. The second cook is also, reliably, the one you would bet on.

Notice what you can actually count about the difference. How many stages run one after another before the plate is done — call that the method’s depth. How many pots are going at once — its width. How often someone stops to taste before continuing — how much of the work is checking rather than cooking. And what the whole thing costs, in time and ingredients. None of this is vague. A method has a shape, and the shape has numbers.

Our wager is that reasoning works the same way. If an AI answering in a single pass is the first cook — one motion, no tasting, occasionally brilliant and occasionally confidently wrong — then working through a reasoning graph, drafting, checking, weighing, and looping back when something is off, is the second. And if that analogy holds, a reasoning graph should have the same countable structure a recipe does: depth, width, how much of it is verification, and what it costs to run. The rest of this document takes that “if” seriously and works out what follows.

Once you can measure the shape, you can ask the question that matters: is the more elaborate method worth it? For a grilled cheese, the one-motion cook is fine. For a sauce that only exists after four stages of reduction, no amount of raw skill collapses it into one step — the depth is not optional; it is what the dish is. The claim this document builds toward is that reasoning has dishes like that too: answers no single-pass system can reach, however capable, because the structure itself is doing part of the work.

What follows is the measuring tape. It defines the shape of a reasoning graph precisely — depth, width, verification density, cost — sorts graphs into a few structural classes, and lays out how to tell when the more expensive structure earns what it costs.

Assumptions

Formal definitions for this appendix are given in B.2. The assumptions beneath the analysis are:

RefAssumption
A1An LLM call can be modeled as a stochastic gate with measurable token, tool, and latency costs.
A2The EIE integrity score is a usable stand-in for output quality Q when comparing graphs on the same task.
A3Unrolling a loop into I sequential copies of its body preserves the graph’s depth and cost analysis.
A4The quality judgments in the comparison tables are hypotheses awaiting the empirical program, not measurements.

B.1 — Theoretical lineage

Reasoning graphs are not a novel mathematical object. They are a specific application of a well-studied structure: the directed acyclic graph (DAG) with typed nodes, data-dependent edges, and optional iteration (which, when unrolled, produces a deeper DAG). The relevant theoretical traditions are:

Circuit complexity (1940s–present). Boolean circuits are DAGs where nodes are logic gates and the two primary measures are size (total gates) and depth (longest path from input to output). Circuit complexity proved that certain functions require certain depths regardless of circuit width — the foundational depth separation results. The key insight for cognitive engineering: depth and size define a hierarchy of computational power, and some problems cannot be solved at insufficient depth no matter how many gates you add.

Dataflow graph theory (1960s–present). Dataflow programs are DAGs where nodes are operations and edges are data paths. Execution is asynchronous: a node fires when all its inputs are available. Dataflow theory provides the execution semantics for reasoning graphs — nodes execute when dependencies are satisfied, tokens flow through edges, and the graph’s topological structure determines what can be parallelized.

Algorithmic complexity (Big-O, 1960s–present). Standard complexity analysis characterizes how costs scale with input size. For reasoning graphs, the natural scaling variables are iteration count, evidence size, and claim count. Big-O analysis applies directly once we define the cost model.

What this appendix adds is the application of these frameworks to reasoning graphs specifically — treating LLM calls as stochastic gates with measurable costs (A1), and analyzing the structural properties of graphs built from reasoning primitives.

B.2 — Formal definitions

Reasoning graph

A reasoning graph G = (V, E, τ, σ) where V is a set of nodes, E ⊆ V × V is a set of directed edges (data dependencies), τ: V → {GEN, RET, VRF, EVL, REV, SYN, BRN, LOP, SIM, OBS} assigns each node a primitive type, and σ: V → PromptSet assigns each node a prompt configuration. Edges represent data flow: if (u, v) ∈ E, then v requires the output of u as input.

Structural measures

MeasureSymbolDefinitionInterpretation
Depth D(G) Length of the longest path from any input node to the output node Critical path length. Minimum sequential LLM calls required. The irreducible latency of the graph.
Width W(G) Maximum number of nodes at any single topological layer Maximum parallelism. Nodes in the same layer have no mutual dependencies and can execute concurrently.
Size |V| Total number of nodes in the graph Total LLM calls required in a single pass (ignoring parallelism).
Verification density ν(G) |{v ∈ V : τ(v) ∈ {VRF, EVL}}| / |V| Fraction of the graph devoted to checking rather than generating. A proxy for epistemic rigor.
Generation density γ(G) |{v ∈ V : τ(v) ∈ {GEN, SYN}}| / |V| Fraction of the graph devoted to content production.
Iteration depth I(G) Maximum number of loop iterations (convergence budget) How many complete passes the graph can execute before forced termination.
Information transfer bandwidth B(G) Semantic units passed between iteration i and i+1 How much learning survives between iterations. Narrow bandwidth prevents anchoring; wide bandwidth preserves context.

Unrolled DAG

A reasoning graph with iteration (LOP nodes) can be analyzed as a DAG by unrolling: replacing the loop with I sequential copies of the loop body, where I is the iteration budget. The unrolled graph G′ has depth D(G′) = Dpre + I × Dloop, where Dpre is the pre-loop depth and Dloop is the depth of one iteration. This is the worst-case DAG. Best-case depth occurs when convergence is reached on the first iteration: Dpre + Dloop.

B.3 — Cost model

Each node in a reasoning graph has a measurable execution cost. We define a per-node cost function and aggregate it to produce graph-level metrics.

Cost(v) = mv · (pv + cv) + tv pv = prompt tokens  ·  cv = completion tokens  ·  mv = model cost multiplier  ·  tv = tool cost

The model multiplier mv accounts for different model sizes and prices at different nodes — e.g., a small model for fact-checking, a large model for generation. Tool cost tv covers retrieval calls, web search, database queries, and external API calls.

Total cost for a run executing node set V′ (the actually-executed subset, which may be less than V if convergence occurs early):

Cost(G) = Σv∈V′ Cost(v)

Latency is the wall-clock critical path. Let S₁, S₂, …, SD be the topological layers of the (unrolled) graph:

Latency(G) = Σi=1..D maxv∈Sᵢ Latency(v)

This is where width matters. Parallel nodes in the same layer contribute only the maximum latency of the layer, not the sum. A graph with width 2 at a given layer pays the cost of the slower node, not both nodes.

Token scaling

Token cost per iteration is not constant. Later iterations include richer context because the evaluation from prior iterations feeds into the strategy node. The key scaling variable is not the iteration index but the claim count — the number of specific assertions, corrections, and evaluation findings that accumulate across iterations.

Let Ci be the claim count at iteration i. The prompt tokens for the strategy node at iteration i scale as:

pstrategy,i = a + b · Ci a = base prompt cost  ·  b = per-claim marginal cost

If claim count grows linearly with iterations (each iteration discovers a roughly constant number of new issues), total token cost is O(I²). If claim count stabilizes (later iterations discover fewer issues because earlier ones resolved them), total token cost approaches O(I). The shape of claim count growth is an empirical question whose answer determines whether context compression is worth the additional node cost.

Actionable implication: if empirical measurement shows Ci growing linearly, add a ContextCompressor node between iterations to reduce claim tables to only unresolved items. If Ci stabilizes naturally (because issues get fixed), compression adds cost without benefit. Measure before optimizing.

B.4 — Topology classification

Reasoning graphs can be classified into complexity classes by their structural properties, analogous to the circuit complexity hierarchy (AC⁰, TC⁰, NC¹, etc.). We propose five classes based on observed topologies in practice. In the columns below, n is the number of nodes — the reasoning steps in the graph — and I is the iteration budget, the maximum number of times a convergence loop may repeat.

ClassNameStructural definitionDepthWidthνExample
G₁ Single-pass One node. No decomposition, no verification, no iteration. 1 1 0.00 Raw LLM API call.
Prompt →
response.
G₂ Linear chain Sequential nodes, no branching, no iteration, no verification nodes. ≤ n 1 0.00 Chain-of-thought.
Prompt →
plan →
draft.
Depth increases, verification stays zero.
G₃ Chain + verify Sequential nodes with at least one VRF or EVL node. No iteration. ≤ n 1 > 0 Generate →
verify →
revise.
Single-pass with checking.
G₄ Iterative verified Sequential nodes with verification, wrapped in a convergence loop. Width = 1. ≤ n × I 1 > 0 The Arcus baseline graph.
Strategy →
draft →
check →
evaluate →
converge, iterated.
G₅ Parallel convergent Multiple independent paths (width > 1) with synthesis/convergence. May include iteration. ≤ n × I > 1 > 0 Parallel evaluation paths (standard + adversarial) converging on a synthesis node. Ensemble reasoning.

VRF and EVL are the two checking primitives a graph can contain. A Verify (VRF) node re-checks a draft against its original inputs — did we actually answer the question, are the cited facts right? An Evaluate (EVL) node judges quality or weighs competing options — how good is this, which alternative wins? Verification density (ν) is simply the share of a graph’s nodes that are one of these two; a graph with none, like G₁ and G₂, is doing no checking at all, which is why its ν is 0.

By construction, each class subsumes the one below it. G₂ can express everything G₁ can (by using a single node). G₃ adds verification. G₄ adds iteration. G₅ adds parallelism with convergent synthesis. The hypothesis — and it is a hypothesis (A4) — is that each increase in class produces measurable improvements in output quality for tasks of sufficient complexity, and that for some tasks, lower classes cannot achieve a target quality threshold regardless of model capability.

The depth separation conjecture

There exist reasoning tasks for which no G₂-class graph (linear chain, no verification) achieves EIE score ≥ τ, regardless of model capability R, but a G₄-class graph achieves EIE ≥ τ with moderate R. If true, this establishes that reasoning quality has structural complexity classes — the founding theorem of cognitive engineering.

B.5 — Worked example: the Arcus baseline graph

The graph below is a reduced, representative form of the Arcus baseline — the production Reg E adjudication graph — trimmed to a handful of nodes so the structural measures are easy to trace. The production graph follows the same G₄ shape at larger scale; a live dossier’s integrity seal records fourteen sealed model calls. It is written in Reason, the language these graphs are authored in, and we analyze it with the framework defined above.

graph answer_question {                 // G₄ · reduced form; node bodies abridged

  node clarify:gen {                     // OBS role
    input: query
    output: clarification
    prompt_set: clarify
  }

  node strategy:gen {                    // GEN
    input: query, clarification, iteration
    output: strategyResult
    prompt_set: strategy
  }

  node draft:gen {                       // GEN
    input: query, strategyResult
    output: draftResult
    prompt_set: draft
  }

  node factCheck:ass {                   // VRF role
    input: draftResult
    output: factCheckResult
    prompt_set: factCheck
  }

  node impact:ass {                      // SIM role
    input: draftResult, factCheckResult
    output: impactResult
    prompt_set: impact
  }

  node strategyEval:ass {                 // EVL role
    input: draftResult, impactResult
    output: judgmentArtifact
    prompt_set: assessor
  }

  gate convergence {                    // EVL role · the loop
    input: judgmentArtifact
    mode: iteration
    max_iterations: 3
    routes: {
      iterate -> strategy          // loop back
      accept  -> exit
      fail    -> exit
    }
  }

  node exit:act {
    input: judgmentArtifact
    output: finalResponse
    action_type: legacy_node
    target: exit
  }
}

A note on two vocabularies (A + C). This appendix classifies each node by an analytic primitive — GEN, VRF, EVL, SIM, RET — chosen so that structural measures like verification density are easy to define. The Reason language tags each node by a smaller set of operations, seen above as :gen, :ass, :crt, :arb, :act. The two do not line up one-to-one: a single :ass node plays whatever checking role the analysis calls VRF or EVL, and the impact node reasons in a SIM (simulation) role though it is authored :ass. The mapping:

Reason tagAnalytic primitiveWhat it does
:genGEN — GenerateProduce an artifact — a strategy, a draft.
:actRET — RetrievePull external facts or run a tool (retrieval action).
:ass, :crtVRF — Verify · EVL — EvaluateCheck a draft against its inputs, judge quality, or challenge it adversarially.
:arbSYN — SynthesizeResolve competing artifacts into one disposition.
:assSIM — SimulatePredict downstream effects — the impact-analysis node.

Verification density (ν) counts the analytic VRF and EVL nodes — authored here as :ass and :crt. The distinction the analysis draws (verify vs. evaluate vs. simulate) is finer than the language needs to execute, which is why several analytic primitives collapse onto :ass. Production node bodies also carry a schema; it is omitted above for brevity.

Structural analysis

MeasureValueDerivation
Pre-loop depth (Dpre)1One Clarification node before the loop
Per-iteration depth (Dloop)6Strategy → Draft → FactCheck → ImpactAnalysis → StrategyEval → ConvergenceCheck
Iteration budget (I)3Maximum 3 iterations before forced convergence
Best-case total depth7Dpre + Dloop × 1 = 1 + 6 = 7 (converges first pass)
Expected total depth13Dpre + Dloop × 2 = 1 + 12 = 13 (empirical: most tasks converge in 2 iterations)
Worst-case total depth19Dpre + Dloop × 3 = 1 + 18 = 19 (all iterations exhausted)
Width1Strictly sequential. Every node depends on the previous node’s output.
Total size (worst case)191 + 6 × 3 = 19 nodes
Verification density (ν)0.503 of 6 loop nodes are VRF or EVL (FactCheck, StrategyEval, ConvergenceCheck)
Generation density (γ)0.332 of 6 loop nodes are GEN (ResponseStrategy, Draft)
Simulation density0.171 of 6 loop nodes is SIM (ImpactAnalysis)
Information transfer bandwidth1 edge / iterationOnly eval → next strategy carries information. Draft is discarded. Learning persists; text does not.

Complexity analysis

Node complexity: O(I · K) where I = iteration count and K = 6 nodes per iteration. Linear in iterations. Each additional iteration adds exactly 6 LLM calls. The constant factor (6) is the iteration unit cost.

Token complexity: O(I · K · t + I² · b · C) where t is average per-node token cost, b is per-claim marginal prompt cost, and C is claims-per-iteration growth rate. The first term is linear (base cost). The second term is quadratic only if claim count grows linearly. If claims stabilize (the common case when the graph is working correctly), effective token complexity approaches O(I).

Latency: O(I · K) because width = 1. No parallelization available. Latency equals total node count. Every node is on the critical path.

Comparison across topology classes

The following table compares the baseline G₄ graph to simpler topologies on the same task, assuming identical model (R) and knowledge (K):

TopologyClassDepthνLLM callsLatencyQuality (hypothesized)
Raw LLM callG₁10.0011Baseline. No structure. Output quality = f(R, K) only.
Plan → DraftG₂20.0022Marginal improvement from planning. No verification.
Plan → Draft → Verify → ReviseG₃40.2544First verification. Catches factual errors. Single-pass.
Arcus baseline (1 iter)G₄70.5077Full strategy/verify/evaluate cycle. High ν. Single pass.
Arcus baseline (2 iter)G₄130.501313Learning transfer. Second pass corrects strategy failures.
Arcus + parallel evalG₅120.501412Adversarial + standard eval in parallel (width 2). More signal, same depth.

The structural insight: moving from G₁ to G₄ multiplies LLM calls by 13× but adds verification density of 0.50, iteration with learning transfer, and strategy-level evaluation. If EIE score improves by more than the proportional cost increase, the graph design is the higher-ROI investment. Preliminary observations suggest EIE improvements of 60–80% for a 13× cost increase — a quality/cost ratio that would be considered excellent in any engineering domain.

B.6 — The quality/cost objective

Graph comparison requires an objective function. We define two standard optimization formulations:

Efficiency maximization: max Q / Cost(G). Find the graph that produces the highest quality per unit cost. This is the standard formulation for resource-constrained environments where budget is fixed and quality must be maximized within it.

Threshold satisfaction: min Cost(G) subject to Q ≥ τ. Find the cheapest graph that achieves a target quality level. This is the standard formulation for regulated environments where a quality floor is mandated and the question is how to reach it at minimum cost.

With these formulations, graph comparison becomes precise:

Graph A dominates Graph B if A achieves ≥ Q at ≤ Cost. Dominance is objective and testable.

The Pareto frontier is the set of graphs where no improvement in Q is possible without increasing Cost. Graphs on the frontier are optimal for their cost level. Graphs below the frontier are suboptimal and should be redesigned.

Graph topology shifts the frontier. If G₄-class graphs produce a higher Pareto frontier than G₃-class graphs across a range of tasks, then the structural complexity of G₄ is justified — the additional verification and iteration nodes produce quality improvements that exceed their cost.

The economic argument in one sentence

Scaling models improves the constants. Graph design can shift the Pareto frontier. The former is expensive and subject to diminishing returns. The latter is a design choice with compounding returns as the discipline matures.

B.7 — Information transfer between iterations

The Arcus baseline graph discards the draft between iterations and carries forward only the evaluation findings. We treat this as a deliberate bandwidth control technique rather than an incidental choice, with the properties below:

PropertyDraft-preserving (wide bandwidth)Eval-only (narrow bandwidth)
Anchoring risk High. Reviser patches text, staying close to original structure and phrasing. Low. Each iteration generates fresh from updated strategy. No structural anchoring.
Error propagation High. Errors in iteration 1’s phrasing can survive into iteration 3 despite corrections. Low. Only the diagnosis persists. The artifact is regenerated.
Token cost Lower per iteration (revision prompt < full generation prompt). Higher per iteration (full generation each pass).
Quality ceiling Bounded by iteration 1’s structure. Revisions are local patches to a fixed frame. Unbounded by prior structure. Each iteration can take a fundamentally different approach.
Analogy Editing a draft. Local improvements within a fixed architecture. Gradient descent. Update the policy, resample the output.

The narrow-bandwidth design trades higher per-iteration token cost for higher quality ceiling and lower error propagation. Each iteration is an independent sample from an improved strategy, not a patch on a potentially flawed artifact. This is the reasoning-graph equivalent of the distinction between policy gradient methods (resample from updated policy) and value patching (modify the existing trajectory) in reinforcement learning.

B.8 — The primitive basis set: open questions

Circuit complexity begins with a basis set of gates (AND, OR, NOT) and asks two foundational questions: is the set complete (can it express all computable Boolean functions) and is it minimal (is any gate redundant)? The same questions apply to the Reason primitive set.

The current basis: GEN, RET, VRF, EVL, REV, SYN, BRN, LOP, SIM, OBS.

Completeness. Can every useful reasoning topology be expressed as a composition of these ten primitives? Preliminary evidence suggests yes — every graph we have designed across credit underwriting, insurance governance, AML/KYC, and general question-answering has been expressible using only these primitives. But absence of a counterexample is not a proof. A formal completeness argument would require defining the class of ‘useful reasoning topologies’ precisely, which is itself an open problem.

Minimality. Can any primitive be expressed as a composition of others? Candidates for reduction:

REV (Revise) may be expressible as GEN conditioned on EVL output. If every revision is just a constrained generation informed by evaluation feedback, REV is syntactic sugar for GEN + EVL, not a true primitive.

SYN (Synthesize) may be expressible as GEN with multiple inputs. If synthesis is just generation from a merged input set, it reduces to GEN.

OBS (Observe) may be expressible as EVL applied to the graph’s own trace. If meta-cognitive monitoring is just evaluation of the reasoning process rather than the reasoning content, it reduces to EVL + trace access.

If REV, SYN, and OBS reduce, the minimal basis might be 7 primitives: GEN, RET, VRF, EVL, BRN, LOP, SIM. Whether this reduction affects expressiveness or merely notation is an open research question.

B.9 — Open theoretical questions

This appendix establishes a measurement framework and a classification hierarchy. Several foundational questions remain open:

Depth separation. Do there exist tasks where G₃-class graphs cannot achieve EIE ≥ τ regardless of R, but G₄-class graphs can? A positive result would be the founding theorem of cognitive engineering — proof that reasoning quality has structural complexity classes.

Verification density threshold. Is there a minimum verification density below which output integrity degrades regardless of model capability? If ν < 0.2 produces unreliable outputs for all R, that’s not a design guideline — it’s a structural law.

Optimal bandwidth. Under what conditions does wide-bandwidth (draft-preserving) iteration outperform narrow-bandwidth (eval-only) iteration? The answer likely depends on the ratio of strategy failures to execution failures.

Basis completeness and minimality. Is the 10-primitive basis complete and minimal? What is the true minimal basis for reasoning graphs?

Graph equivalence. When do two structurally different graphs produce equivalent output distributions? Defining graph equivalence for reasoning (not just computation) requires a quality-aware equivalence relation.

Cost-quality frontier universality. Is the Pareto frontier between cost and quality consistent across tasks, or task-specific? If universal patterns emerge (e.g., verification density ≥ 0.3 is always on the frontier), those patterns become design laws.

Circuit complexity proved that computation has structural depth requirements. Cognitive engineering proposes that reasoning does too. The measurement framework is defined. The classification exists. The questions are precise. What remains is the empirical work to determine which questions have the answers we hope for.